Spmi Bus [2021] Jun 2026

Similar to write, but after sending the address and register pointer, the master releases the bus, and the targeted slave transmits the data.

When a smartphone CPU ramps from idle to 2 GHz, the AP sends an SPMI write command to the PMIC's regulator control register. Within microseconds, the PMIC raises the core voltage. No separate GPIO or analog feedback needed. spmi bus

In the Linux kernel, SPMI is managed by the drivers/spmi/spmi.c framework. A typical device tree node for an SPMI PMIC looks like: Similar to write, but after sending the address

“Where your software meets the voltage rail, SPMI speaks.” No separate GPIO or analog feedback needed

The SPMI bus was first introduced by the System Power Management Interface (SPMI) consortium, a group of companies including major semiconductor and technology firms. The consortium aimed to create a standardized interface for power management that would enable interoperability between different components and reduce design complexity. The first version of the SPMI specification was released in 2010, and since then, the interface has undergone several revisions, with the latest version being SPMI 2.2.