The hardware footprint of the MiniProg3 provides two separate physical connection methods to link with your hardware layouts. 5-Pin Header Layout
The hardware architecture of the MiniProg3 focuses on multi-protocol agility and low-latency interaction with silicon components. psoc miniprog3
It bridges the host computer to standard serial communication protocols including Serial Wire Debug (SWD), Joint Test Action Group (JTAG), Inter-Integrated Circuit ( I2Ccap I squared cap C ), and Serial Peripheral Interface (SPI). The hardware footprint of the MiniProg3 provides two
If you are currently setting up a project, please share you are targetting and how your board is powered so we can optimize your configuration. Joint Test Action Group (JTAG)