Secure32

For a typical Cortex‑M4 running at 100 MHz with 256 KB flash / 64 KB RAM:

of Secure32 v1.0:

| Component | Function | 32‑bit specific optimization | |-----------|----------|-------------------------------| | | Cryptographically verifies each stage of the boot process | Uses SHA‑256 with 32‑bit word alignment; fits within 64 KB of ROM | | Memory Isolation | Separates security monitor from application code via MPU (Memory Protection Unit) | No MMU required – leverages ARMv7‑M MPU or equivalent | | Key Ladder | Derives device‑unique keys from a physical unclonable function (PUF) | 32‑bit PUF entropy extractor with 128‑bit key output | | Attestation | Provides remote verification of firmware integrity | Compact CBOR‑based tokens ≤ 512 bytes | secure32